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TRF1121
www.ti.com
TRF1221
SLWS170B – APRIL 2005 – REVISED JANUARY 2008
Phase Noise
The TRF1121 and TRF1221 achieve superior phase noise performance with on-chip resonators and varactors. It
is designed to meet the phase noise requirements of both single-carrier and multicarrier systems. Due to the chip
architecture, the phase noise and spurious performance of the LO1 PLL is about 15 dB better than the LO2 PLL.
The typical phase noise of the TRF1121 and TRF1221 S-band PLL (LO2) with the PLL locked is shown in
Figure 15 and Figure 16 , respectively. The phase noise plots of the TRF1221 S-band PLL at the min and max
range are shown in Figure 20 and Figure 21 , respectively. These plots were taken at room temperature and
typical voltage conditions.
Figure 15. TRF1121 Typical Integrated LO1 (S-Band) Phase Noise is 0.35 ° rms (100 Hz to 1 MHz)
When designing full-duplex radios that employ narrow T-to-R spacing, one must consider the impact of
wide-band phase noise because it can degrade Rx sensitivity. Figure 17 shows typical wide-band composite
phase noise performance of the combination of the two integrated PLLs. At 50-MHz offset, typical performance is
–145 dBc/Hz.
Copyright ? 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TRF1121 TRF1221
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